Welch-allyn Poem NIBP Module DeveloperS Kit Instructions - Ins Instrukcja Użytkownika Pobierz pdf (Strona 6)

POEM NIBP Module Developer’s Kit Instructions Welch Allyn OEM Technologies

Page 6 Conﬁdential 810-1209-01 Rev. A

METHOD 2 - Logic-Level UART Connection From J4 to Host System

Conﬁgure JMPR3 and JMPR4 as shown in Figure 5. When used in this manner, the Interface

Board imposes no limitations on data rates.

Figure 5 - Logic-Level UART Serial Interface Connection

JMPR4 JMPR3

Conﬁgure JMPR3 and JMPR4 as shown.

Leave J6 unconnected.

Ground of host system

Data to host system

Data from host system

COMM_POL_SEL

Refer to the POEM NIBP

Module OEM

Implementation Manual

for details about

polarities, voltage levels,

and functionality.

1 2 3 4 5 6 7 8

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Welch-allyn Poem NIBP Module DeveloperS Kit Instructions - Ins Instrukcja Użytkownika Strona 6